A Full-mode FME VLSI Architecture Based on 8x8/4x4 Adaptive Hadamard Transform For QFHD H.264/AVC Encoder

نویسندگان

  • Jialiang Liu
  • Xinhua Chen
  • Yibo Fan
  • Xiaoyang Zeng
چکیده

Adaptive Block-size Transform (ABT) has been added to H.264/AVC standard with the Fidelity Range Extension. In this paper, we apply this ABT concept to our FME design and propose a full-mode FME architecture based on 8x8/4x4 adaptive Hadamard Transform. This technique can avoid unifying all variable block-size blocks into 4x4-size blocks and improve the encoding performance. We also exploit the linearity of Hadamard Transform in quarter-pel refinement and decrease the cycles caused by the second long search process. In architecture level, we employ two interpolating engines that can support 8-pel and 4-pel input to time-share one SATD (Sum of Absolute Hadamard Transform) Generator. These strategies can increase parallelism and reduce the cycles efficiently. Besides, this design can support full modes, which guarantees the encoding performance. Experimental results show that our design can achieve real-time processing for QFHD@30fps at the operation frequency of 320MHz with 444.6K gates hardware.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A full-mode FME VLSI architecture based on 8×8/4×4 adaptive Hadamard Transform for QFHD H.264/AVC encoder

Adaptive Block-size Transform (ABT) has been added to H.264/AVC standard with the Fidelity Range Extension. In this paper, we apply this ABT concept to our FME design and propose a full-mode FME architecture based on 8x8/4x4 adaptive Hadamard Transform. This technique can avoid unifying all variable block-size blocks into 4x4-size blocks and improve the encoding performance. We also exploit the...

متن کامل

AN AREA-EFFICIENT DESIGN FOR INTEGER TRANSFORM IN H.264/AVC FRExt

This paper presents an area efficient integer transform design suitable for H.264/MPEG-4 AVC high profile. The proposed design integrates 4x4 and 8x8 integer transform in one design that can save 28% of hardware area and increase the hardware utilization from 50% to 100% when compared with direct separated designs. 1. INTRODUCTION H.264 standard has been used in a broad range of applications fr...

متن کامل

Improved Intra Prediction of H.264/AVC

H.264/AVC is the latest international video coding standard developed by ITU-T Video Coding Expert Group and the ISO/IEC Moving Picture Expert Group, which provides gains in compression efficiency of about 40% compared to previous standards (ISO/IEC 14496-10, 2004, Weigand et al., 2003). New and advanced techniques are introduced in this new standard, such as intra prediction for I-frame encodi...

متن کامل

VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC

The H.264/AVC Fractional Motion Estimation (FME) with rate-distortion constrained mode decision can improve the rate-distortion efficiency by 2–6 dB in peak signal-to-noise ratio. However, it comes with considerable computation complexity. Acceleration by dedicated hardware is a must for real-time applications. The main difficulty for FME hardware implementation is parallel processing under the...

متن کامل

An Efficient VLSI Architecture of Fractional Motion Estimation in H.264 for HDTV

Fractional Motion Estimation (FME) in highdefinition H.264 presents a significant design challenge in terms of memory bandwidth, latency and area cost as there are various modes and complex mode decision flow, which require over 45% of the computation complexity in the H.264 encoding process. In this paper, a new highperformance VLSI architecture for Fractional Motion Estimation (FME) in H.264/...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2011